A Security RISC The State of Microarchitectural Attacks on RISC V
Microarchitectural attacks threaten the security of computer systems even in the absence of software vulnerabilities. While x86 and ARM CPUs have been extensively studied, the rising popularity of RISCV CPUs demands a thorough examination of their microarchitectural attack surface. With the standardization of the RISCV instruction set architecture and the announcement of support for the architecture by major processor vendors, RISCV CPUs are on the verge of becoming ubiquitous. In this talk, we will show a systematic investigation of the microarchitectural attack surface on the first commerciallyavailable 64bit hardware RISCV By: Lukas Gerlach, Michael Schwarz, Daniel Weber Full Abstract and Presentation Materials:
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